Solid state imaging devices, including charge coupled devices (CCD), complementary metal oxide semiconductor (CMOS) imaging devices, and others, have been used in photo imaging applications. A solid state imaging device circuit includes a focal plane array of pixel cells or pixels as an image sensor, each cell including a photosensor, which may be a photogate, photoconductor, a photodiode, or other photosensor having a doped region for accumulating photo-generated charge. For CMOS imaging devices, each pixel has a charge storage region, formed on or in the substrate, which is connected to the gate of an output transistor that is part of a readout circuit. The charge storage region may be constructed as a floating diffusion region. In some CMOS imaging devices, each pixel may further include at least one electronic device such as a transistor for transferring charge from the photosensor to the storage region and one device, also typically a transistor, for resetting the storage region to a predetermined charge level prior to charge transference.
In a CMOS imaging device, the active elements of a pixel perform the necessary functions of: (1) photon to charge conversion; (2) accumulation of image charge; (3) resetting the storage region to a known state; (4) transfer of charge to the storage region; (5) selection of a pixel for readout; and (6) output and amplification of a signal representing pixel charge. Photo charge may be amplified when it moves from the initial charge accumulation region to the storage region. The charge at the storage region is typically converted to a pixel output voltage by a source follower output transistor.
CMOS imaging devices of the type discussed above are generally known as discussed, for example, in U.S. Pat. Nos. 6,140,630, 6,376,868, 6,310,366, 6,326,652, 6,204,524, and 6,333,205, assigned to Micron Technology, Inc.
One issue in the field of solid state imaging devices is noise reduction, particularly for devices with a small pixel size. As pixel size decreases, the effect of noise on image quality increases. Noise reduction techniques are used to improve the appearance of captured images. One method of noise reduction is to improve the fabrication process, however, such improvements are often cost prohibitive. An alternative solution is to apply noise filters during image processing. One noise reduction technique detects areas devoid of features (i.e., flat-field areas) and averages pixel signals in those areas of the image, as described in U.S. patent application Ser. No. 11/601,390, filed Nov. 17, 2006, which is incorporated herein by reference. This method can be implemented at a low cost in hardware logic, but can produce an unwanted side-effect of creating zipper artifacts, which are often conspicuous to the viewer. Accordingly, there is a need to provide quality, artifact-free flat-field noise reduction while maintaining a low hardware logic cost.